Interrupt Force Register Low (Intfrcln); Interrupt Request Level Register (Irlrn); Intfrcln Field Descriptions; Irqn Field Descriptions - Motorola ColdFire MCF5281 User Manual

Register Descriptions
.
31
Field
Reset
R/W
15
Field
Reset
R/W
Figure 10-6. Interrupt Force Register Low (INTFRCLn)
Bits Name
31–1 INTFRC Interrupt force. Allows software generation of interrupts for each possible source for functional or
debug purposes.
0 No interrupt forced on corresponding interrupt source
1 Force an interrupt on the corresponding source
0 — Reserved, should be cleared.

10.3.4 Interrupt Request Level Register (IRLRn)

This 7-bit register is updated each machine cycle and represents the current interrupt
requests for each interrupt level, where bit 7 corresponds to level 7, bit 6 to level 6, etc. This
register output is combined with similar outputs from INTC1 and eventually encoded into
the 3-bit priority interrupt level driven to the processor core.
Field
Reset
R/W
Address
Figure 10-7. Interrupt RequestLevel Register (IRLRn)
Bits Name
7–1 IRQ Interrupt requests. Represents the prioritized active interrupts for each level.
0 There are no active interrupts at this level
1 There is an active interrupt at this level
0 — Reserved
10-10
INTFRCL[31:16]
0000_0000_0000_0000
INTFRCL[16:1]
0000_0000_0000_0000
IPSBAR + 0xC14, 0xD14
Table 10-9. INTFRCLn Field Descriptions
7
IRQ[7:1]
IPSBAR + 0xC18, 0xD18
Table 10-10. IRQn Field Descriptions
MCF5282 User's Manual
R
R
Description
2
0000_0000
R
Description
16
1 0
—
1 0
—
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