Rsti And Configuration Override Timing - Motorola ColdFire MCF5281 User Manual

Motorola microcontroller user's manual
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Table 33-14. Reset and Configuration Override Timing (Continued)
NUM
R5
RSTO valid to Config. Overrides valid
R6
Configuration Override Setup Time to RSTO invalid
R7
Configuration Override Hold Time after RSTO invalid
R8
RSTO invalid to Configuration Override High Impedance
1
All AC timing is shown with respect to 50% V
2
During low-power STOP, the synchronizers for the RSTI input are bypassed and RSTI is asserted asynchronously to
the system. Thus, RSTI must be held a minimum of 100 ns.
CLKOUT
RSTI
RSTO
Configuration Overrides:
(RCON, Override pins)
Figure 33-8. RSTI and Configuration Override Timing
2
33.11 I
C Input/Output Timing Specifications
Table 33-15 lists specifications for the I
Table 33-15. I
Num
I1
Start condition hold time
I2
Clock low period
I3
SCL/SDA rise time (V
I4
Data hold time
I5
SCL/SDA fall time (V
I6
Clock high time
I7
Data setup time
I8
Start condition setup time (for repeated start condition only)
I9
Stop condition setup time
MOTOROLA
(V
= 2.7 to 3.6 V, V
DD
Characteristic
levels unless otherwise noted.
DD
R1
R3
2
C input timing parameters shown in Figure 33-9.
2
C Input Timing Specifications between SCL and SDA
Characteristic
= 0.5 V to V
= 2.4 V)
IL
IH
= 2.4 V to V
= 0.5 V)
IH
IL
Chapter 33. Electrical Characteristics
2
I
C Input/Output Timing Specifications
1
= 0 V)
SS
Symbol
t
ROVCV
t
COS
t
COH
t
ROICZ
R2
R4
R5
Min
Max
2
8
0
4
0
2
2
Min
Max
Unit
0
ns
20
t
CYC
0
ns
1
t
CYC
R4
R8
R6
R7
Units
Bus clocks
Bus clocks
1
mS
ns
1
mS
Bus clocks
ns
Bus clocks
Bus clocks
33-19

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