Cfm Clock Divider Register (Cfmclkd); Cfmcr Field Descriptions - Motorola ColdFire MCF5281 User Manual

Motorola microcontroller user's manual
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Bits
Name
15–11
10
LOCK
9
PVIE
8
AEIE
7
CBEIE
6
CCIE
5
KEYACC
4–0
6.3.4.2

CFM Clock Divider Register (CFMCLKD)

The CFMCLKD is used to set the frequency of the clock used for timed events in program
and erase algorithms.
Field
DIVLD
Reset
R/W
Address
Figure 6-5. CFM Clock Divider Register (CFMCLKD)
All bits in CFMCLKD are readable. Bit 7 is a read-only status bit, while bits 6–0 can only
be written once.
MOTOROLA
Table 6-4. CFMCR Field Descriptions
Reserved, should be cleared.
Write lock control. The LOCK bit is always readable and is set once.
1 CFMPROT, CMFSACC, and CFMDACC register are write-locked.
0 CFMPROT, CMFSACC, and CFMDACC register are writable.
Protection violation interrupt enable. The PVIE bit is readable and writable. The PVIE bit
enables an interrupt in case the protection violation flag, PVIOL, is set.
1 An interrupt will be requested whenever the PVIOL flag is set.
0 PVIOL interrupts disabled.
Access error interrupt enable. The AEIE bit is readable and writable. The AEIE bit enables
an interrupt in case the access error flag, ACCERR, is set.
1 An interrupt will be requested whenever the ACCERR flag is set.
0 ACCERR interrupts disabled.
Command buffer empty interrupt enable. The CBEIE bit is readable and writable. CBEIE
enables an interrupt request when the command buffer for the Flash physical blocks is
empty.
1 Request an interrupt whenever the CBEIF flag is set.
0 Command buffer empty interrupts disabled
Command complete interrupt enable. The CCIE bit is readable and writable. CCIE enables
an interrupt when the command executing for the Flash is complete.
1 Request an interrupt whenever the CCIF flag is set.
0 Command complete interrupts disabled
Enable security key writing. The KEYACC bit is readable and only writable if the KEYEN
bit in the CFMSEC register is set.
1 Writes to the Flash array are interpreted as keys to open the back door.
0 Writes to the Flash array are interpreted as the start of a program, erase, or verify
sequence.
Reserved, should be cleared.
7
6
5
PRDIV8
R
IPSBAR + 0x1D_0002
Chapter 6. ColdFire Flash Module (CFM)
Description
DIV
0000_0000
R/W
Memory Map
0
6-9

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