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Chapter 3
Enhanced Multiply-Accumulate Unit
(EMAC)
This chapter describes the functionality, microarchitecture, and performance of the
enhanced multiply-accumulate (EMAC) unit in the ColdFire family of processors.
3.1
Multiply-Accumulate Unit
The MAC design provides a set of DSP operations which can be used to improve the
performance of embedded code while supporting the integer multiply instructions of the
baseline ColdFire architecture.
The MAC provides functionality in three related areas:
• Signed and unsigned integer multiplies
• Multiply-accumulate operations supporting signed and unsigned integer operands as
well as signed, fixed-point, fractional operands
• Miscellaneous register operations
The ColdFire family supports two MAC implementations with different performance levels
and capabilities. The original MAC uses a three-stage execution pipeline optimized for
16-bit operands and featuring a 16x16 multiply array with a single 32-bit accumulator. The
EMAC features a four-stage pipeline optimized for 32-bit operands, with a fully pipelined
32x32 multiply array and four 48-bit accumulators.
The first ColdFire MAC supported signed and unsigned integer operands and was
optimized for 16x16 operations, such as those found in a variety of applications including
servo control and image compression. As ColdFire-based systems proliferated, the desire
for more precision on input operands increased. The result was an improved ColdFire MAC
with user-programmable control to optionally enable use of fractional input operands.
EMAC improvements target three primary areas:
• Improved performance of 32x32 multiply operations.
• Addition of three more accumulators to minimize MAC pipeline stalls caused by
exchanges between the accumulator and the pipeline's general-purpose registers.
MOTOROLA
Chapter 3. Enhanced Multiply-Accumulate Unit (EMAC)
3-1
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