Motorola ColdFire MCF5281 User Manual page 304

MCF5282 External Signals
This pin can also be configured as GPIO PEH5.
14.2.6.6 Collision (ECOL)
The ECOL input is asserted upon detection of a collision and remains asserted while the
collision persists. This signal is not defined for full-duplex mode.
This pin can also be configured as GPIO PEH4.
14.2.6.7 Receive Clock (ERXCLK)
The receive clock (ERXCLK) input provides a timing reference for ERXDV, ERXD[3:0],
and ERXER.
This pin can also be configured as GPIO PEH3.
14.2.6.8 Receive Data Valid (ERXDV)
Asserting the receive data valid (ERXDV) input indicates that the PHY has valid nibbles
present on the MII. ERXDV should remain asserted from the first recovered nibble of the
frame through to the last nibble. Assertion of ERXDV must start no later than the SFD and
exclude any EOF.
This pin can also be configured as GPIO PEH2.
14.2.6.9 Receive Data 0 (ERXD0)
ERXD0 is the Ethernet input data transferred from the PHY to the media-access controller
when ErXDV is asserted. This signal is used for 10 Mbps Ethernet data. This signal is also
used for MII mode Ethernet data in conjunction with ERXD[3:1]. This pin can also be
configured as GPIO PEH1.
14.2.6.10 Carrier Receive Sense (ECRS)
ECRS is an input signal which, when asserted, signals that transmit or receive medium is
not idle, and applies to MII mode operation.
This pin can also be configured as GPIO PEH0.
14.2.6.11 Transmit Data 1-3 (ETXD[3:1])
These pins contain the serial output Ethernet data and are valid only during assertion of
ETXEN in MII mode.
These pins can also be configured as GPIO PEL[7:5].
14.2.6.12 Transmit Error (ETXER)
When the ETXER output is asserted for one or more E_TXCLKs while ETXEN is also
asserted, the PHY sends one or more illegal symbols. ETXER has no effect at 10 Mbps or
when ETXEN is negated, and applies to MII mode operation.
14-24 MCF5282 User's Manual MOTOROLA