Bit Timing; Examples Of System Clock/Can Bit-Rate/S-Clock - Motorola ColdFire MCF5281 User Manual

Functional Overview

25.4.8 Bit Timing

The FlexCAN module uses three 8-bit registers to set up the bit timing parameters required
by the CAN protocol. Control registers 1 and 2 (CANCTRL1, CANCTRL2) contain the
PROPSEG, PSEG1, PSEG2, and the RJW fields which allow the user to configure the bit
timing parameters. The prescaler divide register (PRESDIV) allows the user to select the
ratio used to derive the S-clock from the system clock. The time quanta clock operates at
the S-clock frequency. Table 25-7 provides examples of system clock, CAN bit rate, and
S-clock bit timing parameters.
Table 25-7. Examples of System Clock/CAN Bit-Rate/S-Clock
System Clock Can bit-rate
Freq (Mhz) (Mhz)
48
40
32
48 0.125
40 0.125
32 0.125
25.4.8.1 Configuring the FlexCAN Bit Timing
The following considerations must be observed when programming bit timing functions.
• If the programmed PRESDIV value results in a single system clock per one time
quantum, then the PSEG2 field in CANCTRL1 register should not be programmed
to zero.
• If the programmed PRESDIV value results in a single system clock per one time
quantum, then the information processing time (IPT) equals three time quanta,
otherwise it equals two time quanta. If PSEG2 equals two, then the FlexCAN
transmits one time quantum late relative to the scheduled sync segment.
• If the prescaler and bit timing control fields are programmed to values that result in
fewer than ten system clock periods per CAN bit time and the CAN bus loading is
100%, anytime the rising edge of a start-of-frame (SOF) symbol transmitted by
another node occurs during the third bit of the intermission between messages, the
FlexCAN may not be able to prepare a message buffer for transmission in time to
begin its own transmission and arbitrate against the message which transmitted the
early SOF.
• The FlexCAN bit time must be programmed to be greater than or equal to nine
system clocks, or correct operation is not guaranteed.
25-14
Possible
S-Clock Freq
(Mhz)
1 8,12,24
1 10,20
1 8,16
1,1.5,2,3
1,2,2.5
1,2
MCF5282 User's Manual
Possible Pre-Scaler
number of programed
time-quanta/bit value + 1
8,12,24 3,2,1
10,20 2,1
8,16 2,1
8,12,16,24 24,16,12,8
8,16,20 20,10,8
8,16 16,8
Comments
Min 8 time-quanta
Max 25 time-quanta
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