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Table
Number
15-3
DRAM Controller Registers ....................................................................................... 15-4
15-4
DCR Field Descriptions.............................................................................................. 15-5
15-5
DACRn Field Descriptions ......................................................................................... 15-6
15-6
DMRn Field Descriptions ........................................................................................... 15-8
15-7
Generic Address Multiplexing Scheme ...................................................................... 15-9
15-8
MCF5282 to SDRAM Interface (8-Bit Port, 9-Column Address Lines).................. 15-10
15-9
MCF5282 to SDRAM Interface (8-Bit Port,10-Column Address Lines)................. 15-10
15-10
MCF5282 to SDRAM Interface (8-Bit Port,11-Column Address Lines)................ 15-10
15-11
MCF5282 to SDRAM Interface (8-Bit Port,12-Column Address Lines)................ 15-10
15-12
MCF5282 to SDRAM Interface (8-Bit Port,13-Column Address Lines)................. 15-10
15-13
MCF5282 to SDRAM Interface (16-Bit Port, 8-Column Address Lines)................ 15-11
15-14
MCF5282 to SDRAM Interface (16-Bit Port, 9-Column Address Lines)............... 15-11
15-15
MCF5282 to SDRAM Interface (16-Bit Port, 10-Column Address Lines)............. 15-11
15-16
MCF5282 to SDRAM Interface (16-Bit Port, 11-Column Address Lines).............. 15-11
15-17
MCF5282 to SDRAM Interface (16-Bit Port, 12-Column Address Lines).............. 15-11
15-18
MCF5282 to SDRAM Interface (16-Bit Port, 13-Column-Address Lines) ............ 15-12
15-19
MCF5282 to SDRAM Interface (32-Bit Port, 8-Column Address Lines)................ 15-12
15-20
MCF5282 to SDRAM Interface (32-Bit Port, 9-Column Address Lines)................ 15-12
15-21
MCF5282 to SDRAM Interface (32-Bit Port, 10-Column Address Lines).............. 15-12
15-22
MCF5282 to SDRAM Interface (32-Bit Port, 11-Column Address Lines).............. 15-12
15-23
MCF5282 to SDRAM Interface (32-Bit Port, 12-Column Address Lines).............. 15-13
15-24
SDRAM Hardware Connections ............................................................................. 15-13
15-25
SDRAM Example Specifications ............................................................................ 15-19
15-26
SDRAM Hardware Connections ............................................................................. 15-20
15-27
DCR Initialization Values......................................................................................... 15-20
15-28
DACR Initialization Values...................................................................................... 15-21
15-29
DMR0 Initialization Values...................................................................................... 15-22
15-30
Mode Register Initialization .................................................................................... 15-23
15-31
Mode Register Mapping to MCF5282 A[31:0] ........................................................ 15-24
16-1
DMAREQC Field Description.................................................................................... 16-3
16-2
Memory Map for DMA Controller Module Registers................................................ 16-5
16-3
DCRn Field Descriptions............................................................................................ 16-8
16-4
DSRn Field Descriptions ......................................................................................... 16-10
17-1
ECR[ETHER_EN] De-Assertion Effect on FEC ....................................................... 17-6
17-2
User Initialization (Before ECR[ETHER_EN]) ......................................................... 17-6
17-3
FEC User Initialization (Before ECR[ETHER_EN]) ................................................. 17-7
17-4
Microcontroller Initialization...................................................................................... 17-7
17-5
MII Mode .................................................................................................................... 17-8
17-6
7-Wire Mode Configuration ....................................................................................... 17-8
17-7
Destination Address to 6-Bit Hash ........................................................................... 17-14
17-8
PAUSE Frame Field Specification ........................................................................... 17-16
17-9
Module Memory Map ............................................................................................... 17-20
17-10
FEC Register Memory Map...................................................................................... 17-20
xxxvi
TABLES
Title
MCF5282 User's Manual
Page
Number
MOTOROLA
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