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Cache Operation
Once an external fetch has been initiated and the data is loaded into the line-fill buffer, the
cache maintains a special "most-recently-used" indicator that tracks the contents of the
associated line-fill buffer versus its corresponding cache location. At the time of the miss,
the hardware indicator is set, marking the line-fill buffer as "most recently used." If a
subsequent access occurs to the cache location defined by bits [10:4] (or bits [9:4] for split
configurations of the fill buffer address), the data in the cache memory array is now most
recently used, so the hardware indicator is cleared. In all cases, the indicator defines
whether the contents of the line-fill buffer or the memory data array are most recently used.
At the time of the next cache miss, the contents of the line-fill buffer are written into the
memory array if the entire line is present, and the line-fill buffer data is still most recently
used compared to the memory array.
Generally, longword references are used for sequential instruction fetches. If the processor
branches to an odd word address, a word-sized instruction fetch is generated.
For instruction fetches, the fill buffer can also be used as temporary storage for line-sized
bursts of non-cacheable references under control of CACR[CEIB]. With this bit set, a
noncacheable instruction fetch is processed as defined by Table 4-2. For this condition, the
line-fill buffer is loaded and subsequent references can hit in the buffer, but the data is never
loaded into the memory array.
Table 4-2 shows the relationship between CACR bits 31 and 10 and the type of instruction
fetch.
Table 4-2. Instruction Cache Operation as Defined by CACR[31, 10]
CACR[31]
CACR[10]
0
0
0
1
1
X
1
0
1
1
4-6
Type of Instruction Fetch
N/A
N/A
Cacheable
Noncacheable
Noncacheable
MCF5282 User's Manual
Description
Cache is completely disabled; all instruction fetches are
word or longword in size.
All instruction fetches are word or longword in size
Fetch size is defined by Table 4-1 and contents of the
line-fill buffer can be written into the memory array
All instruction fetches are word or longword in size, and
not loaded into the line-fill buffer
Instruction fetch size is defined by Table 4-1 and loaded
into the line-fill buffer, but are never written into the
memory array.
MOTOROLA
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