Misaligned Operands; Line Write Burst (3-2-2-2) With One Wait State; Line Write Burst-Inhibited - Motorola ColdFire MCF5281 User Manual

Misaligned Operands

Figure 13-17 shows a line burst write with one wait-state insertion.
CLKOUT
A[31:0]
R/W, TIP
SIZ[1:0]
TS
CSn, OE, BSn
D[31:0]
TA
Figure 13-17. Line Write Burst (3-2-2-2) with One Wait State
Figure 13-18 shows a burst-inhibited line write. The external device executes a basic write
cycle while determining that a line is being transferred. The external device uses fast
termination to end each subsequent transfer.
S0
CLKOUT
A[31:0]
R/W, TIP
SIZ[1:0]
TS
CSn
OE, BSn
D[31:0]
TA
13.5 Misaligned Operands
Because operands can reside at any byte boundary, unlike opcodes, they are allowed to be
misaligned. A byte operand is properly aligned at any address, a word operand is
13-14
S0 S1 S2 S3
WS
Write
S1 S2 S3 S4 S5 S0 S1 S4 S5 S0 S1 S4 S5 S0 S1 S4 S5
A[3:2] = 00
Line
Write
Basic
Figure 13-18. Line Write Burst-Inhibited
MCF5282 User's Manual
S4 S5 S6 S7
WS
Write
A[3:2] = 01 A[3:2] = 10
Longword
Write
Fast Fast
S8 S9 S10
WS WS
Write
Write
A[3:2] = 11
Write
Write
Fast
MOTOROLA
S11