DMA Timer Module AC Timing Specifications
33.13 DMA Timer Module AC Timing Specifications
Table 33-21 lists timer module AC timings.
Table 33-21. Timer Module AC Timing Specifications
Name
T1
DTIN0 / DTIN1 / DTIN2 / DTIN3 cycle time
T2
DTIN0 / DTIN1 / DTIN2 / DTIN3 pulse width
1
All timing references to CLKOUT are given to its rising edge when bit 3 of the SDRAM control register is 0.
33.14 QSPI Electrical Specifications
Table 33-22 lists QSPI timings.
Table 33-22. QSPI Modules AC Timing Specifications
Name
QS1
QSPI_CS[3:0] to QSPI_CLK
QS2
QSPI_CLK high to QSPI_DOUT valid.
QS3
QSPI_CLK high to QSPI_DOUT invalid. (Output hold)
QS4
QSPI_DIN to QSPI_CLK (Input setup)
QS5
QSPI_DIN to QSPI_CLK (Input hold)
The values in Table 33-22 correspond to Figure 33-14.
QS1
QSPI_CS[3:0]
QSPI_CLK
QSPI_DOUT
QSPI_DIN
33-24
Characteristic
Characteristic
QS2
QS3
Figure 33-14. QSPI Timing
MCF5282 User's Manual
1
QS4
Min
Max
Unit
3
—
t
CYC
1
—
t
CYC
Min
Max
1 × tcyc
510 × tcyc
—
12
2
—
10
—
10
—
QS5
MOTOROLA
Unit
ns
ns
ns
ns
ns