Control Register Map - Motorola ColdFire MCF5281 User Manual

Background Debug Mode (BDM)
29.5.3.3.9 Read Control Register (
Reads the selected control register and returns the 32-bit result. Accesses to the
processor/memory control registers are always 32 bits wide, regardless of register width.
The second and third words of the command form a 32-bit address, which the debug
module uses to generate a special bus cycle to access the specified control register. The
12-bit Rc field is the same as that used by the MOVEC instruction.
Command/Result Formats:
15
Command 0x2
0x0
0x0
Result
Rc encoding:
29-32
RCREG
12 11
0x9
0x0
Figure 29-33.
RCREG
Table 29-19. Control Register Map
Rc
0x002
0x004
0x005
0x800
0x801
0x804
0x805
0x806
0x807 MAC Accumulator 0,1 Extension Bytes (ACCEXT01)
0x808 MAC Accumulator 2,3 Extension Bytes (ACCEXT23)
0x809
0x80A
0x80B
0x80E
0x80F
0xC04 Flash Base Address Register 0 (FLASHBAR)
0xC05 RAM Base Address Register (RAMBAR)
MCF5282 User's Manual
)
8 7
0x8
0x0
Rc
D[31:16]
D[15:0]
Command/Result Formats
Register Definition
Cache Control Register (CACR)
Access Control Register (ACR0)
Access Control Register (ACR1)
Other Stack Pointer (OTHER_A7)
Vector Base Register (VBR)
MAC Status Register (MACSR)
MAC Mask Register (MASK)
MAC Accumulator 0 (ACC0)
MAC Accumulator 1 (ACC1)
MAC Accumulator 2 (ACC2)
MAC Accumulator 3 (ACC3)
Status Register (SR)
Program Register (PC)
4 3 0
0x0
0x0
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