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Overview
RCON
CLKMOD0
Configuration
CLKMOD1
RSTI
Reset
Controller
RSTO
TEA
TA
TS
4
BS[3:0]
External
OE
Interface
2
SIZ[1:0]
Module
R/W
TIP
32
D[31:0]
24
A[23:0]
7
CS[6:0]
Selects
IRQ[7:1]
Edgeport
2
SDRAM_CS[1:0]
DRAMW
DRAM
SRAS
Controller
SCAS
SCKE
CLKOUT
EXTAL
Clock Module
(PLL)
XTAL
ETXCLK
ETXEN
ETXDO
ECOL
ERXCLK
ERXDV
ERXD0
ECRS
ETXD[3:1]
ETXER
ERXD[3:1]
ERXER
EMDIO
EMDC
Figure 14-1. MCF5282 Block Diagram with Signal Interfaces
14-2
Chip
Chip
Interrupt
Controller 0
Interrupt
Controller 1
FEC
QADC
MCF5282 User's Manual
TDO/DSO
TCLK
TMS/BKPT
JTAG
Port
TDI/DSI
TRST/DSCLK
JTAG_EN
Ports
Module
VDDF
UART0
UART1
UART2
Serial
Serial
Serial
I/O
I/O
I/O
General
General
Purpose
Purpose
Timer A
Timer B
Debug Module
DDATA[3:0]
4
ColdFire V2 Core
Flash
64K
Module
SRAM
DIV
EMAC
2-Kbyte
D-Cache/I-Cache
DMA
Timer
2
I
C
Watchdog
Modules
Timer
Module
(DTIM0–
DTIM3)
Timers
QSPI
FlexCAN
(PIT0–
PIT3)
MOTOROLA
Test
Controller
VSTBY
PIT
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