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Chapter 31
IEEE 1149.1 Test Access Port (JTAG)
The Joint Test Action Group, or JTAG, is a dedicated user-accessible test logic, that
complies with the IEEE 1149.1 standard for boundary-scan testability, to help with system
diagnostic and manufacturing testing.
This architecture provides access to all data and chip control pins from the board-edge
connector through the standard four-pin test access port (TAP) and the JTAG reset pin,
TRST.
Figure 31-1 shows the block diagram of the JTAG module.
MOTOROLA
Chapter 31. IEEE 1149.1 Test Access Port (JTAG)
31-1
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