Protocol Description - Texas Instruments OMAP5910 Reference Manual

Table 9. Setup Register 5 (SR5) (Read/Write)
Bits Field
1 IT_EN
0 DMA_TX_EN
1.2

Protocol Description

SPRU686
Value Description
In the IT mode, an interrupt is generated each
time a word has been transferred or received.
This interrupt is a negative edge-triggered
interrupt. A status register (IST) allows the CPU
to know which interrupt (receive or/and transmit)
occurred.
0 The IT mode is disabled.
1 The IT mode is enabled.
0 The DMA transmit mode is disabled.
1 The DMA transmit mode is enabled.
Note:
The content of this register must not be changed when a read or write
process is running.
Set up the DMA, IT, AUTO_TX, and CS_TOGGLE modes in this register.
In the DMA mode, a DMA request is initiated each time a transmission slot is
available.
The maximum word size in the DMA mode is 16 bits.
Notes:
Another CS cannot be used in the normal or DMA mode when a DMA mode
is active on one specific CS.
To use the MicroWire in the DMA transmit modes, the DMA_EN and
AUTO_TX_EN must be enabled, and IT_EN is best disabled. The
AUTO_TX_EN can be active when the DMA_EN is disabled.
The serial port must be configured in order to use the setup registers.
This interface can only drive one device at a given time. Therefore, the
chip-select of the selected device must be set to its active level before starting
any read or write process.
MicroWire Interface
Reset
Value
MicroWire Interface
0
0
17