NEC V850E/Dx3 Preliminary User's Manual page 504

Chapter 15
Bit Position
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(2) WDTM - WDT mode register
This register sets the operating mode of the Watchdog Timer and enables or
disables counting.
When the Watchdog Timer is running and shall not overflow, it is necessary to
write to WDTM before the specified running time has elapsed.
Access This register can be read/written in 8-bit units. Once the Watchdog Timer is
started (WDTM.RUN = 1), the contents of this register cannot be changed.
Writing to this register is protected by a special sequence of instructions.
Please refer to "WCMD - WDT command protection register" on page 505 for
details.
Address <base> + 4
H
Initial Value 00 . This register is cleared by SYSRESWDT. This stops the timer and
H
unlocks the registers. The register remains unchanged after SYSRES.
7 6
RUN LOCK_TM
R/W R
Table 15-5 WDTM register contents
Bit Name Function
RUN Watchdog Timer running:
0: Timer stopped
1: Timer running (with the time interval specified in register WDCS)
LOCK_TM WDTM register protection status:
0: Register unlocked
1: Register locked (write-protected)
LOCK_CS WDCS register protection status:
0: Register unlocked
1: Register locked (write-protected)
WDTMODE Watchdog Timer operation mode:
0: Mode 0: Generates the non-maskable interrupt NMIWDT upon overflow
1: Mode 1: Generates RESWDT upon overflow
Note After SYSRESWDT, the timer is always stopped and initialized. You can
change the register contents by writing.
When the timer is running, you can also write to this register, but the write
operation does not change the register contents (WDTM.LOCK_TM = 1).
When the timer is running, the write access resets the counter.
To write to the WDTM register:
1. Write one byte to the WCMD register (the value is ignored).
2. Immediately after that, write one byte to the WDTM register (the value is
ignored).
With this procedure, restarting the counter is always possible, regardless of the
register's write protection status.
Preliminary User's Manual U17566EE1V2UM00
5 4 3
LOCK_CS 0 WDTMODE
R R R/W
Watchdog Timer (WDT)
2 1 0
0 0 0
R R R