Description; Devices Μpd70(F)3420, Μpd70(F)3421, Μpd70(F)3422, Μpd70F3423 - NEC V850E/Dx3 Preliminary User's Manual

Power Supply Scheme
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25.2 Description

25.2.1 Devices µPD70(F)3420, µPD70(F)3421, µPD70(F)3422,
µPD70F3423
Figure 25-1 gives an overview of the allocation of power supply pins of the
µPD70(F)3420, µPD70(F)3421, µPD70(F)3422, µPD70F3423 devices. Their
functional assignment is depicted in more detail in Figure 25-2.
Note The diagrams do not show the exact pin location.
Figure 25-1 Power supply pins for µPD70(F)3420, µPD70(F)3421, µPD70(F)3422,
µPD70F3423
Reg
1
REGC0
REGC1
REGC2
Core
Peripherals
ClockGen Buffer
POC
Figure 25-2 Functional assignment of power supply pins (µPD70(F)3420,
µPD70(F)3421, µPD70(F)3422, µPD70F3423)
Preliminary User's Manual U17566EE1V2UM00
LCD -C/D com/seg / -Bus I/F I/O
VDD52
REGC2
CPU
VSS52
RAM
Flash/ROM
ClockGen
Peripherals
POC
ADC
VC
Stepper Motor I/O
LCD Stepper
I/O LCD I/O LCD I/O
voltage
Buffer Buffer
generation
Chapter 25
VSS51
REGC1
n.c.
BVSS50
BVDD50
VSS50
REGC0
n.c.
Voltage
Motor Compa- ADC
AVREF
Buffer rators
857