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Chapter 18
STCFn
0
1
Condition for clearing (STCFn = 0)
• Cleared by IICCn.STTn = 1
• After reset
IICBSYn
0
1
Condition for clearing (IICBSYn = 0)
• When stop condition is detected
• After reset
STCENn
0
1
Condition for clearing (STCENn = 0)
• When start condition is detected
• After reset
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IICFn - IICn flag registers
The registers set the I
Access
This register can be read/written in 8-bit or 1-bit units.
STCFn and IICBSYn bits are read-only.
Address
<base> + A
H
Initial Value
00
. This register is cleared by any reset.
H
7
STCFn
IICBSYn
R
IICRSVn enables/disables the communication reservation function.
The initial value of the IICBSYn bit is set by using the STCENn bit (see
"Cautions" on page 624).
The IICRSVn and STCENn bits can be written only when operation of I
disabled (IICCn.IICEn = 0). After operation is enabled, IICFn can be read.
Start condition issued
Start condition cannot be issued, STTn bit cleared
Bus released status
Bus communication status
Start conditions cannot be generated until a stop condition is detected following operation enable
(IICEn bit = 1).
Start conditions can be generated even if a stop condition is not detected following operation
enable (IICEn = 1).
Preliminary User's Manual U17566EE1V2UM00
2
Cn operation mode and indicate the I
6
5
4
0
0
R
R/W
R/W
STTn clear
Condition for setting (STCFn = 1)
•
When start condition is not issued and STTn flag
is cleared during communication reservation is
disabled (IICRSVn = 1).
2
I
Cn bus status
Condition for setting (IICBSYn = 1)
• When start condition is detected
• By setting the IICCn.IICEn bit when the STCENn =
0
Initial start enable trigger
Condition for setting (STCENn = 1)
• Setting by instruction
2
I
C Bus (IIC)
2
C bus status.
3
2
1
0
0
STCENn IICRSVn
R/W
R/W
R/W
0
R/W
2
Cn is
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