NEC V850E/Dx3 Preliminary User's Manual page 828

Chapter 23
Bit position
7
6
5 to 4
3
1
0
828
Downloaded from Elcodis.com electronic components distributor
(1) LBCTL0 - LCD Bus Interface control register
The 8-bit LBCTL0 register controls the operation of the LCD Bus Interface.
Access This register can be read/written in 8-bit or 1-bit units.
Address FFFF FB60
H
Initial Value 00 . This register is cleared by any reset.
H
7
EL0 IMD0
R/W R/W
Table 23-4 LBCTL0 register contents
Bit name Function
EL0 Level of signal "E" in mod68 mode
0: E is active high; data is read/written on the falling edge.
1: E is active low, data is read/written on the rising edge.
IMD0 Mode of external bus interface access
0: mod80 mode - control signals are WR and RD
1: mod68 mode - control signals are E and R/W
LBC0[1:0] Selects the internal clock
LBC01
0
0
1
1
TCIS0 Select interrupt generation
0: During write access to the bus interface, an interrupt is generated as soon as
data is transferred from LBDATA0 to the write buffer.
During read access from the bus interface, an interrupt is generated as soon as
data is available in the LBDATA0 and LBDATAR0 registers.
1: An interrupt is generated as soon as the read or write transfer via the bus
interface has completed.
TPF0 Transfer in progress on external bus interface
0: The external bus interface is idle
1: Data is transferred on the external bus interface
BYF0 Data register busy
0: Data can be read or written from/to LBDATA0
Data can be read from LBDATAR0
1: Register LBDATA0 (LBDATAR0) is busy
Preliminary User's Manual U17566EE1V2UM00
6 5 4
LBC01 LBC00 TCIS0
R/W R/W
LBC00 Selected clock
SPCLK0
0
SPCLK1
1
SPCLK2
0
SPCLK5
1
LCD Bus Interface (LCD-I/F)
3 2 1
0 TPF0
R/W R R
0
BYF0
R