NEC V850E/Dx3 Preliminary User's Manual page 384

Chapter 11
384
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(c) Conflict between trigger detection and match with TPnCCR1 register
If the trigger is detected immediately after the INTTPnCC1 signal is
generated, the 16-bit counter is immediately cleared to 0000H, the output
signal of the TOPn1 pin is asserted, and the counter continues counting.
Consequently, the inactive period of the PWM waveform is shortened.
External trigger input
INTTPnCC1 signal
If the trigger is detected immediately before the INTTPnCC1 signal is
generated, the INTTPnCC1 signal is not generated, and the 16-bit counter
is cleared to 0000H and continues counting. The output signal of the
TOPn1 pin remains active. Consequently, the active period of the PWM
waveform is extended.
16-bit counter FFFF 0000
External trigger input
(TIPn0 pin input)
TPnCCR1 register
INTTPnCC1 signal
TOPn1 pin output
Preliminary User's Manual U17566EE1V2UM00
16-bit counter FFFF 0000
(TIPn0 pin input)
TPnCCR1 register
TOPn1 pin output
− 2
D 0000
1
D
1
Extended
16-bit Timer/Event Counter P (TMP)
− 1
D 0000
1
D
1
Shortened
− 1
0001 D D
1 1