Chapter 19
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<3> Mask setting for CAN module 1 (mask 1) (Example)
(Using CAN1 address mask 1 registers L and H (C1MASKL1 and
C1MASKH1))
CMID2
CMID2
CMID2
CMID2
8
7
6
1
0
0
CMID1
CMID1
CMID1
CMID1
7
6
5
1
1
1
CMID6
CMID5
CMID4
CMID3
1
1
1
1: Not compared (masked)
0: Compared
The CMID27 to CMID24 and CMID22 bits are cleared to 0, and the
CMID28, CMID23, and CMID21 to CMID0 bits are set to 1.
Preliminary User's Manual U17566EE1V2UM00
CMID2
CMID2
CMID2
5
4
3
2
0
0
1
0
CMID1
CMID1
CMID1
4
3
2
1
1
1
1
1
CMID2
CMID1
CMID0
1
1
1
1
CAN Controller (CAN)
CMID2
CMID2
CMID1
CMID1
1
0
9
1
1
1
CMID1
CMID9
CMID8
CMID7
0
1
1
1
8
1
1