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16-bit Timer/Event Counter P (TMP)
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(c) Notes on rewriting the TPnCCR0 register
To change the value of the TPnCCR0 register to a smaller value, stop
counting once and then change the set value.
If the value of the TPnCCR0 register is rewritten to a smaller value during
counting, the 16-bit counter may overflow.
FFFFH
16-bit counter
0000H
TPnCE bit
TPnCCR0 register
INTTPnCC0 signal
External event
count signal
interval (1)
(D
+ 1)
1
If the value of the TPnCCR0 register is changed from D
count value is greater than D
transferred to the CCR0 buffer register as soon as the TPnCCR0 register
has been rewritten. Consequently, the value that is compared with the
16-bit counter is D
Because the count value has already exceeded D
counter counts up to FFFFH, overflows, and then counts up again from
0000H. When the count value matches D
generated.
Therefore, the INTTPnCC0 signal may not be generated at the valid edge
count of "(D
1
generated at the valid edge count of "(10000H + D
Preliminary User's Manual U17566EE1V2UM00
D
D
1
1
D
2
D
1
External event count signal
interval (NG)
(10000H + D
+ 1)
2
but less than D
2
.
2
+ 1) times" or "(D
+ 1) times" originally expected, but may be
2
Chapter 11
D
D
2
2
D
2
External event
count signal
interval (2)
(D
+ 1)
2
to D
while the
1
2
, the count value is
1
, however, the 16-bit
2
, the INTTPnCC0 signal is
2
+ 1) times".
2
373
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