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Chapter 17
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17.4.6 Continuous mode (slave mode, transmission/reception
mode)
MSB first (CBnCTL0.CBnDIR bit = 0), communication type 2 (see 16.4 (2)
CSIBn control register 1 (CBnCTL1)), transfer data length = 8 bits
(CBnCTL2.CSnCL3 to CBnCTL2.CBnCL0 bits = 0, 0, 0, 0)
CBnTX
55H
SCKBn
SOBn
0
1
SIBn
1
1
INTCBnT
INTCBnR
CBnTSF
CBnSCE
Shift register
SO latch
CBnRX
(5)
(1)
(2)
(3)
(4)
(1) Clear the CBnCTL0.CBnPWR bit to 0.
(2) Set the CBnCTL1 and CBnCTL2 registers to specify the transfer mode.
(3) Set the CBnTXE, CBnRXE and CBnSCE bits of the CBnCTL0 register to 1
at the same time as specifying the transfer mode using the CBnDIR bit, to
set the transmission/reception enabled status.
(4) Set the CBnPWR bit to 1 to enable supply of the CSIBn operation.
(5) Write the transfer data to the CBnTX register.
(6) The transmission enable interrupt request signal (INTCBnT) is received
and the transfer data is written to the CBnTX register.
(7) The reception complete interrupt request signal (INTCBnR) is output.
Preliminary User's Manual U17566EE1V2UM00
0
1
0
1
0
1
1
0
0
0
1
1
0
0
1
0
CCH
(6)
(7)
Clocked Serial Interface (CSIB)
AAH
1
0
1
0
1
0
0
1
0
1
1
0
96H
CCH
96H
(7)
(8)
00H
00H
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