NEC V850E/Dx3 Preliminary User's Manual page 689

32-bit single-chip microcontroller
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CAN Controller (CAN)
After reset: 0000H R
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CnERC - CANn module error counter register
The CnERC register indicates the count value of the transmission/reception
error counter.
Address: CnERC <CnRBaseAddr> + 054H
15
14
CnERC
REPS
REC6
7
6
TEC7
TEC6
REPS
0
1
REC6 to
REC0
0 to 127
Note
The REC6 to REC0 bits of the reception error counter are invalid in the
reception error passive status (CnINFO.RECS1, CnINFO.RECS0 bit = 11B).
TEC7 to
TEC0
0 to 255
Note
The TEC7 to TEC0 bits of the transmission error counter are invalid in the bus-
off status (CnINFO.BOFF bit = 1).
Preliminary User's Manual U17566EE1V2UM00
13
12
11
REC5
REC4
REC3
5
4
3
TEC5
TEC4
TEC3
Reception error passive status bit
The value of the reception error counter is not error passive (< 128)
The value of the reception error counter is in the error passive range
(≥ 128)
Reception error counter bit
Number of reception errors. These bits reflect the status of the
reception error counter. The number of errors is defined by the CAN
protocol.
Transmission error counter bit
Number of transmission errors. These bits reflect the status of
the transmission error counter. The number of errors is
defined by the CAN protocol.
Chapter 19
10
9
8
REC2
REC1
REC0
2
1
0
TEC2
TEC1
TEC0
689

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