Pin Functions In Reset And Power Save Modes - NEC V850E/Dx3 Preliminary User's Manual

Pin Functions
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2.6 Pin Functions in Reset and Power Save Modes

The following table summarizes the status of the pins during reset and power
save modes and after release of these operating states in normal operation
mode, i.e. FLMD0 = 0.
The reset source makes a difference concerning the N-Wire debugger
interface pins DRST, DDI, DDO, DCK and DMS after reset release. An external
RESET or an internal Power-on-clear switches all pins to input port mode,
while all other internal reset sources make the pins available for the debugger.
In contrast to all other power save modes the HALT mode suspends only the
CPU operation and has no effect on any pin status.
Table 2-58 Pin functions and reset / power save modes
Operating status
Power-On-
Clear
external
RESET
all other reset
sources
HALT mode
IDLE, WATCH,
Sub-WATCH,
STOP mode
a)
Inputs with wake-up capability: external interrupts (INTPn, NMI) and CAN receive
data (CRXDn)
If flash programming mode is enabled by FLMD0 = 1 P07 is used as FLMD1
pin in input port mode during and after reset.
Preliminary User's Manual U17566EE1V2UM00
Pin status
during • P05/DRST: P05 port input with internal pull-down
resistor
• all other pins: Hi-Z (3-state)
after input port mode
during • P05/DRST: P05 port input with internal pull-down
resistor
• all other pins: Hi-Z (3-state)
after • P05/DRST: DRST input with internal pull-down resistor
• P52/DDI, P54/DCK, P55/DMS: DDI, DCK, DMS inputs
• P53/DDO: DDO output
• all other pins: input port mode
during • P05/DRST: P05 port input with internal pull-down
resistor
• all other pins: Hi-Z (3-state)
after • P05/DRST, P52/DDI, P54/DCK, P55/DMS, P53/DDO:
no change. same function as before reset
• all other pins: input port mode
during same as before HALT mode
after
during same as before power save mode:
• Output signals are valid and output levels are
remained.
• Input signals with wake-up capability
• Input signals without wake-up capability are ignored.
after same as before power save mode
Chapter 2
a
are valid.
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