NEC V850E/Dx3 Preliminary User's Manual page 673

CAN Controller (CAN)
Address
offset
52H
53H
54H
55H
56H
57H
56H
57H
58H
59H
58H
59H
5AH
5CH
5DH
5EH
60H
61H
60H
61H
F62H
64H
65H
64H
65H
66H
67H
66H
67H
68H to FFH
a)
Base address: <CnRBaseAddr>
Downloaded from Elcodis.com electronic components distributor
Table 19-24 CAN module register bit configuration (2/2)
Symbol Bit 7/15 Bit 6/14 Bit 5/13
a
CnLEC (R) 0
CnINFO 0
CnERC
CnIE (W) 0
0
CnIE (R) 0
0
CnINTS (W) 0
0
CnINTS (R) 0
0
CnBRP
CnBTR 0
0
CnLIPT
CnRGPT (W) 0
0
CnRGPT (R) 0
CnLOPT
CnTGPT (W) 0
0
CnTGPT (R) 0
CnTS (W) 0
0
CnTS (R) 0
0
-
Preliminary User's Manual U17566EE1V2UM00
Bit 4/12 Bit 3/11
0 0 0
0 0 BOFF TECS1
TEC7 to TEC0
REC7 to REC0
0 Clear Clear Clear
CIE5 CIE4 CIE3
0 Set CIE5 Set CIE4 Set CIE3
0 CIE5 CIE4 CIE3
0 0 0
0 Clear Clear Clear
CINTS5 CINTS4 CINTS3
0 0 0
0 CINTS5 CINTS4 CINTS3
0 0 0
TQPRS7 to TQPRS0
0 0 0
0 SJW1, SJW0
LIPT7 to LIPT0
0 0 0
0 0 0
0 0 0
RGPT7 to RGPT0
LOPT7 to LOPT0
0 0 0
0 0 0
0 0 0
TGPT7 to TGPT0
0 0 0
0 0 0
0 0 0
0 0 0
Access prohibited (reser ved for future use)
Chapter 19
Bit 2/10 Bit 1/9 Bit 0/8
0 LEC2 LEC1
TECS0 RECS1
Clear Clear
CIE2 CIE1
Set CIE2 Set CIE1 Set CIE0
CIE2 CIE1
0 0 0
Clear Clear
CINTS2 CINTS1 CINTS0
0 0 0
CINTS2 CINTS1 CINTS0
0 0 0
TSEG13 to TSEG10
0 TSEG22 to TSEG20
0 0 0
0 0 0
0 0 RHPM
0 0 0
0 0 0
0 0 THPM
0 Clear Clear
TSLOCK TSSEL
0 Set Set
TSLOCK TSSEL
0 TSLOCK TSSEL
0 0 0
LEC0
RECS0
Clear
CIE0
CIE0
0
Clear
0
0
Clear
ROVF
0
ROVF
Clear
TOVF
0
TOVF
Clear
TSEN
Set
TSEN
TSEN
0
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