NEC V850E/Dx3 Preliminary User's Manual page 243

32-bit single-chip microcontroller
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Flash Memory
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Serial interface pins
The pins used by each serial interface are shown in the table below.
Table 6-4
Pins used by each serial interface
Serial interface
UARTA0
CSIB0
CSIB0 + HS
In flash programming mode the output drive strength control of the pins
TXDA0, SOB0 and P84 is disabled. By this means the port pins provide
maximum driver capability in order to maximize the transmission data rate to
the flash programmer.
Caution
1.
Since the output drive strength control of the pins TXDA0, SOB0 and P84 is
disabled during programming these pins are not short-circuit proof any
more. Short circuits at these pins may permanently damage the device.
2.
If other devices are connected to the serial interface pins in use for flash
memory programming in on-board programming mode take care that the
concerned signals do not conflict with the signals of the flash programmer
and the microcontroller. Output pins of the other devices must be isolated or
set in high impedance state. Ensure that the other devices do not
malfunction because of flash programmer signals.
3.
Pay attention in particular if the flash programmer's RESET signal is
connected also to an on-board reset generation circuit. The reset output of
the reset generator may ruin the flash programming process and may need
to be isolated.
4.
All the port pins, including the pin connected to the flash programmer, go
into an output high-impedance state in the flash memory programming
mode. If there is a problem such as that an external device connected to a
port prohibits the output high-impedance state, connect the port to V
V
via a resistor.
SS
5.
Connect all oscillator pins in the same way as in the normal operation mode.
6.
Supply the same power to all power supply pins, including reference
voltages, power regulator pins, etc., as in the normal operation mode.
Preliminary User's Manual U17566EE1V2UM00
Pins
TXDA0, RXDA0 at pins P30/P31
SOB0, SIB0, SCKB0 at pins P40 - P42
SOB0, SIB0, SCKB0, P84
Chapter 6
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DD
243

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