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Clocked Serial Interface (CSIB)
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17.4.3 Continuous mode (master mode, transmission/reception
mode)
MSB first (CBnCTL0.CBnDIR bit = 0), communication type 3 (see 16.4 (2)
CSIBn control register 1 (CBnCTL1)), transfer data length = 8 bits
(CBnCTL2.CBnCL3 to CBnCTL2.CBnCL0 bits = 0, 0, 0, 0)
CBnTX
55H
SCKBn
SOBn
0
1
0
SIBn
1
1
0
INTCBnT
INTCBnR
CBnTSF
CBnSCE
Shift register
SO latch
CBnRX
(1)
(5)
(6)
(2)
(3)
(4)
(1) Clear the CBnCTL0.CBnPWR bit to 0.
(2) Set the CBnCTL1 and CBnCTL2 registers to specify the transfer mode.
(3) Set the CBnTXE, CBnRXE, and CBnSCE bits of the CBnCTL0 register to
1 at the same time as specifying the transfer mode using the CBnDIR bit,
to set the transmission/reception enabled status.
(4) Set the CBnPWR bit to 1 to enable the CSIBn operation.
(5) Write transfer data to the CBnTX register (transmission start).
(6) The transmission enable interrupt request signal (INTCBnT) is received
and transfer data is written to the CBnTX register.
(7) The reception complete interrupt request signal (INTCBnR) is output.
Read the CBnRX register before the next receive data arrives or before
the CBnPWR bit is cleared to 0.
Preliminary User's Manual U17566EE1V2UM00
AAH
1
0
1
0
1
1
0
1
0
0
1
1
0
0
1
0
0
1
CCH
CCH
(7)
Chapter 17
1
0
1
0
0
1
1
0
96H
00H
96H
00H
(7)
(8)
555
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