Power-Fail Compare Mode - NEC V850E/Dx3 Preliminary User's Manual

32-bit single-chip microcontroller
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20.4.4 Power-fail compare mode

The A/D conversion end interrupt request signal (INTAD) can be controlled as
follows by the ADA0PFM and ADA0PFT registers.
• If the power-fail compare mode is disabled (ADA0PFM.ADA0PFE = 0), the
INTAD signal is generated each time conversion is completed.
• If the power-fail compare mode is enabled (ADA0PFM.ADA0PFE = 1) and
ADA0PFM.ADA0PFC = 0, the value of the ADCR0Hn register is compared
with the value of the ADA0PFT register when conversion is completed, and
the INTAD signal is generated only if ADCR0H0 ≥ ADA0PFT.
• If the power-fail compare mode is enabled (ADA0PFM.ADA0PFE = 1) and
ADA0PFM.ADA0PFC = 1, the value of the ADCR0Hn register is compared
with the value of the ADA0PFT register when conversion is completed, and
the INTAD signal is generated only if ADCR0H0 < ADA0PFT.
In the power-fail compare mode, two modes are available as modes in which to
set the ANIn pins: continuous select mode and continuous scan mode.
(1)
Continuous select mode
In this mode, the higher 8 bits of conversion result of the ANIn channel in
ADA0CR0Hn, specified by ADA0S, is compared with the value of the
ADA0PFT register.
If the result of power-fail comparison matches the condition set by the
ADA0PFM.ADA0PFC bit, INTAD is generated.
In any case the next conversion is started.
ANIn
A/D
Data 1
Data 1
INTAD
ADA0PFT
unmatch
Figure 20-6
Timing example of continuous select mode operation whit power-fail
comparison
Preliminary User's Manual U17566EE1V2UM00
Data 2
Data 3
Data 4
Data 2
Data 3
ADA0PFT
ADA0PFT
ADA0PFT
unmatch
match
Chapter 20
Data 5
Data 6
Data 4
Data 5
ADA0PFT
ADA0PFT
match
unmatch
match
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