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Reset
Item
Main oscillator
Sub oscillator
Ring oscillator
SSCG clock
PLL clock
CPU system clock (VBCLK)
CPU
Watchdog Timer (WDTCLK)
Watch Timer (WTCLK)
Peripheral clocks
On-chip peripheral functions
I/O pins
(port/alternative function pins)
a)
The main oscillator is started by the internal firmware. However the application software has to ensure stable
main oscillation before utilizing this clock for any purpose. SSCG and PLL must be started by the application
software. Assure also here that the stabilization time has passed. See chapter "Clock Generator" on page 129
for details.
b)
The status of the N-Wire debug interface pins DRST (P05), DDI (P52), DDO (P53), DCK (P54), DMS (P55)
after reset depends on the reset value of the OCDM register, and therefore on the reset source. See chapter
"Pin Functions" on page 33 for details.
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Hardware status
With each reset function the hardware is initialized (including the watchdog).
When the reset status is released, program execution is started.
The following table describes the status of the clocks during reset and after
reset release. Note that the clock status "operates" does not inevitably mean
that any function using this clock source operates as well. The function may
additionally require to be enabled by other means.
Table 26-1
Hardware status during and after reset
During reset
Stops oscillation
Operates
Operates
Stops operation
Stops operation
Stops operation
Initialized
Stops operation
Stops operation
Stop operation
Stop operation
All pins are in input port mode
description.
Preliminary User's Manual U17566EE1V2UM00
After reset
a
Stopped
Starts oscillation
Starts oscillation
The ring oscillator clock is the default clock source
after reset release.
a
Stopped
a
Stopped
Starts oscillation based on the ring oscillator clock.
Program execution starts after oscillation stabilization
time.
Starts operation based on ring oscillator clock
Starts operation based on ring oscillator clock
• PCLK0–2: operating based on ring-osc
• PCLK3-15: stopped
• SPCLK0–2: operating based on ring-osc
• SPCLK3-15: stopped
Depends on availability of peripheral clock and default
status of the peripheral function.
b
. See chapter "Pin Functions" on page 33 for a
Chapter 26
863
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