Table of Contents
Advertisement
Asynchronous Serial Interface (UARTA)
Downloaded from
Elcodis.com
electronic components distributor
(2)
Odd parity
• During transmission
Opposite to even parity, the number of bits whose value is "1" among the
transmit data, including the parity bit, is controlled so that it is an odd
number. The parity bit values are as follows.
– Odd number of bits whose value is "1" among transmit data: 0
– Even number of bits whose value is "1" among transmit data: 1
• During reception
The number of bits whose value is "1" among the receive data, including
the parity bit, is counted, and if it is an even number, a parity error is output.
(3)
0 parity
During transmission, the parity bit is always made 0, regardless of the transmit
data.
During reception, parity bit check is not performed. Therefore, no parity error
occurs, regardless of whether the parity bit is 0 or 1.
(4)
No parity
No parity bit is added to the transmit data.
Reception is performed assuming that there is no parity bit. No parity error
occurs since there is no parity bit.
Preliminary User's Manual U17566EE1V2UM00
Chapter 16
531
Advertisement
Table of Contents
