Writing To External Devices - NEC V850E/Dx3 Preliminary User's Manual

Bus and Memory Control (BCU, MEMC)
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7.6.1 Writing to external devices

This section shows typical sequences of writing data to external devices.
(1) Write with external wait cycle
BCLK
A[23:0] (output)
CSk (output)
RD (output)
WR (output)
D]31:0] (I/O)
WAIT (input)
Figure 7-11 Timing: write data
Register settings:
• BCTm.BTk0 = 0 (connected external device is SRAM or external I/O)
• ASC.ACk[1:0] = 00
• DWCm.DWk[2:0] = 000
• BCC.BCk[1:0] = 00
Note 1. The circles indicate the sampling timing.
2. The broken line indicates the high-impedance state (bus is not driven).
The data has to be stable at the rising edge of the WR signal. For details refer
to the Electrical Target Specification.
Preliminary User's Manual U17566EE1V2UM00
T1 T2 T1
Address Address
Data
(no address setup wait states inserted)
B
(no programmable data wait states inserted)
B
(no idle states inserted)
B
Chapter 7
TW T2
Data
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