NEC V850E/Dx3 Preliminary User's Manual page 683

32-bit single-chip microcontroller
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CAN Controller (CAN)
After reset: 0000H R/W
CnCTRL
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CnCTRL - CANn module control register
The CnCTRL register is used to control the operation mode of the CAN
module.
Address: CnCTRL <CnRBaseAddr> + 050
(a) Read
15
14
13
0
0
0
7
6
5
CCERC
AL
VALID
RSTAT
Reception status bit
0
Reception is stopped.
1
Reception is in progress.
Note
1.
The RSTAT bit is set to 1 under the following conditions (timing)
The SOF bit of a receive frame is detected
On occurrence of arbitration loss during a transmit frame
2.
The RSTAT bit is cleared to 0 under the following conditions (timing)
When a recessive level is detected at the second bit of the interframe
space
On transition to the initialization mode at the first bit of the interframe
space
TSTAT
Transmission status bit
0
Transmission is stopped.
1
Transmission is in progress.
Note
1.
The TSTAT bit is set to 1 under the following conditions (timing)
The SOF bit of a transmit frame is detected
The first bit of an error flag is detected during a transmit frame
2.
The TSTAT bit is cleared to 0 under the following conditions (timing)
During transition to bus-off status
On occurrence of arbitration loss in transmit frame
On detection of recessive level at the second bit of the interframe space
On transition to the initialization mode at the first bit of the interframe
space
Preliminary User's Manual U17566EE1V2UM00
H
12
11
10
0
0
0
4
3
2
PSMODE
PSMODE
OPMODE
1
0
2
Chapter 19
9
8
RSTAT
TSTAT
1
0
OPMODE
OPMODE
1
0
683

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