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Asynchronous Serial Interface (UARTA)
Chapter 16
16.5.5 UART transmission
A high level is output to the TXDAn pin by setting the UAnCTL0.UAnPWR bit to
1.
Next, the transmission enabled status is set by setting the UAnCTL0.UAnTXE
bit to 1, and transmission is started by writing transmit data to the UAnTX
register. The start bit, parity bit, and stop bit are automatically added.
Since the CTS (transmit enable signal) input pin is not provided in UARTAn,
use a port to check that reception is enabled at the transmit destination.
The data in the UAnTX register is transferred to the UARTAn transmit shift
register upon the start of the transmit operation.
A transmission enable interrupt request signal (INTUAnT) is generated upon
completion of transmission of the data of the UAnTX register to the UARTAn
transmit shift register, and thereafter the contents of the UARTAn transmit shift
register are output to the TXDAn pin.
Write of the next transmit data to the UAnTX register is enabled by generating
the INTUAnT signal.
Start
Parity
Stop
D0
D1
D2
D3
D4
D5
D6
D7
bit
bit
bit
INTUAnT
Note
LSB first
Preliminary User's Manual U17566EE1V2UM00
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