NEC V850E/Dx3 Preliminary User's Manual page 658

Chapter 19
State
Receiving node detects an error (except bit error
in the active error flag or overload flag).
Receiving node detects dominant level following
error flag of error frame.
Transmitting node transmits an error flag.
[As exceptions, the error counter does not
change in the following cases.]
<1>
<2>
Bit error detection while active error flag or
overload flag is being output (error-active
transmitting node)
Bit error detection while active error flag or
overload flag is being output (error-active
receiving node)
When the node detects 14 consecutive
dominant-level bits from the beginning of the
active error flag or overload flag, and then
subsequently detects 8 consecutive dominant-
level bits.
When the node detects 8 consecutive dominant
levels after a passive error flag
When the transmitting node has completed
transmission without error
(±0 if error counter = 0)
When the receiving node has completed
reception without error
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(b) Error counter
The error counter counts up when an error has occurred, and counts down
upon successful transmission and reception. The error counter is updated
during the first bit of the error delimiter.
Table 19-14 Error counter
ACK error is detected in error passive
state and dominant level is not detected
while the passive error flag is being output.
A stuff error is detected in an arbitration
field that transmitted a recessive level as a
stuff bit, but a dominant level is detected.
Preliminary User's Manual U17566EE1V2UM00
Transmission error counter
(TEC7 to TEC0 Bits)
No change
No change
+8
+8
No change
+8 (transmitting)
–1
No change
CAN Controller (CAN)
Reception error counter
(REC6 to REC0 Bits)
+1 (REPS bit = 0)
+8 (REPS bit = 0)
No change
No change
+8 (REPS bit = 0)
+8 (receiving, REPS bit = 0)
No change
• –1
(1 ≤ REC6 to REC0 ≤ 127,
REPS bit = 0)
• ±0
(REC6 to REC0 = 0,
REPS bit = 0)
• Any value of 119 to 127 is
set
(REPS bit = 1)