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16-bit Multi-Purpose Timer G (TMG)
Chapter 13
(b) When the value 0000H is set in GCCnm
INTCCGnm is activated when the value of the counter becomes 0001H.
INTTMGn0/INTTMGn1 is activated when the value of the counter changes
from FFFFH to 0000H.
Note, however, that even if no data is set in GCCnm, INTCCGnm is activated
immediately after the counter starts.
(c) When the value FFFFH is set in GCCnm
INTCCGnm and INTTMGn0/INTTMGn1 are activated when the value of the
counter changes from FFFFH to 0000H.
(d) When GCCnm is rewritten during operation
When GCCn1 is rewritten from 5555H to AAAAH. TMGn0 is selected as the
counter.
The following operation is performed:
ENFG0
Ma tch
Ma tch
TM G n0
Reload in 5 periods
GCCn1 Slave register
5555H
AAAAH
5555H
AAAAH
GCCn1 Master register
INTTGnCC1
Figure 13-7
Timing when GCCn1 is rewritten during operation (free run)
Caution
To perform successive write access during operation, for rewriting the GCCny
register (n = 1 to 4), you have to wait for minimum 7 peripheral clocks periods
(f
).
SPCLK0
Preliminary User's Manual U17566EE1V2UM00
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