Non-Maskable Interrupt Status Flag (Np); Nmi0 Control - NEC V850E/Dx3 Preliminary User's Manual

32-bit single-chip microcontroller
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Chapter 5
PSW
Bit position
7
202
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5.2.3 Non-maskable interrupt status flag (NP)

The NP flag is a status flag that indicates that non-maskable interrupt (NMI)
processing is under execution.
This flag is set when an NMI interrupt has been acknowledged, and masks all
interrupt requests and exceptions to prohibit multiple interrupts from being
acknowledged.
31
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NP EP
Bit name
Function
NP
Indicates whether NMI interrupt processing is in progress.
0: No NMI interrupt processing
1: NMI interrupt currently being processed

5.2.4 NMI0 control

The NMI0 can be configured to generate an NMI upon a rising, falling or both
edges at the NMI pin. To enable respectively disable the NMI0 and to configure
the edge refer to "Edge and Level Detection Configuration" on page 218.
Preliminary User's Manual U17566EE1V2UM00
Interrupt Controller (INTC)
8
7
6
5
4
3
2
1
ID
SAT CY OV
S
0
Initial value
Z
00000020H

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