Dma Destination Address Registers - NEC V850E/Dx3 Preliminary User's Manual

Chapter 8
15
DDAH0 IR
15
DDAH1 IR
15
DDAH2 IR
15
DDAH3 IR
Bit position
15
11 to 0
314
Downloaded from Elcodis.com electronic components distributor

8.3.2 DMA destination address registers

These registers are used to set the DMA destination address (28 bits each) for
DMA channel n. They are divided into two 16-bit registers, DDAHn and
DDALn.
Since these registers are configured as 2-stage FIFO buffer registers, a new
destination address for DMA transfer can be specified during DMA transfer
(refer to "Automatic Restart Function" on page 323).
Caution DMA transfers of misaligned 16-bit/32-bit data is not supported.
(1) DDAHn - DMA destination address registers Hn
These registers can be read/written in 16-bit units.
14 13 12 11 10 9
0 0 0 DA27 DA26 DA25
14 13 12 11 10 9
0 0 0 DA27 DA26 DA25
14 13 12 11 10 9
0 0 0 DA27 DA26 DA25
14 13 12 11 10 9
0 0 0 DA27 DA26 DA25
Bit name Function
IR Specifies the DMA destination address.
0: External memory or On-chip peripheral I/O
1: Internal RAM
DA27 to Sets the DMA destination addresses (A27 to A16). During DMA transfer, it stores
DA16 the next DMA transfer destination address.
Preliminary User's Manual U17566EE1V2UM00
8 7 6 5 4 3
DA24 DA23 DA22 DA21 DA20 DA19
8 7 6 5 4 3
DA24 DA23 DA22 DA21 DA20 DA19
8 7 6 5 4 3
DA24 DA23 DA22 DA21 DA20 DA19
8 7 6 5 4 3
DA24 DA23 DA22 DA21 DA20 DA19
DMA Controller (DMAC)
Initial
2 1 0 Address
value
DA18 DA17 DA16 FFFFF086H undef.
Initial
2 1 0 Address
value
DA18 DA17 DA16 FFFFF08EH undef.
Initial
2 1 0 Address
value
DA18 DA17 DA16 FFFFF096H undef.
Initial
2 1 0 Address
value
DA18 DA17 DA16 FFFFF09EH undef.