Addresses - NEC V850E/Dx3 Preliminary User's Manual

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I C Bus (IIC) Chapter 18

18.6.2 Addresses

The 7 bits of data that follow the start condition are defined as an address.
An address is a 7-bit data segment that is output in order to select one of the
slave devices that are connected to the master device via the bus lines.
Therefore, each slave device connected via the bus lines must have a unique
address.
The slave devices include hardware that detects the start condition and checks
whether or not the 7-bit address data matches the data values stored in the
SVAn register. If the address data matches the values of the SVAn register, the
slave device is selected and communicates with the master device until the
master device transmits a start condition or stop condition.
SCLn
1 2 3 4 5 6 7 8 9
SDAn AD6 AD5 AD4 AD3 AD2 AD1 AD0 R/W
Address
Note
INTIICn
Figure 18-7 Address
Note The interrupt request signal (INTIICn) is generated if a local address or
extension code is received during slave device operation.
The slave address and the eighth bit, which specifies the transfer direction as
described in "Transfer direction specification" on page 596, are written together
to IIC shift register n (IICn) and then output. Received addresses are written to
the IICn register.
The slave address is assigned to the higher 7 bits of the IICn register.
Preliminary User's Manual U17566EE1V2UM00 595
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