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7.2.3 Non-maskable interrupt status flag (NP)
The NP flag is bit 7 of the PSW.
The NP flag is a status flag that indicates that non-maskable interrupt (NMI) processing is under execution. This
flag is set when the NMI interrupt has been acknowledged, and masks all interrupt requests and exceptions to
prohibit multiple interrupts from being acknowledged.
31
PSW
0
0
0
0
Bit Position
Bit Name
7
NP
7.2.4 Noise elimination
NMI pin noise is eliminated with analog delay. The delay time is 60 to 220 ns. The signal input that changes
within the delay time is not internally acknowledged.
The NMI pin is used for releasing the software STOP mode. In the software STOP mode, the internal system
clock is not used for noise elimination because the internal system clock is stopped.
7.2.5 Edge detection function
INTM0 is a register that specifies the valid edge of the non-maskable interrupt (NMI). The NMI valid edge can be
specified to be either the rising edge or the falling edge by the ESN0 bit.
This register can be read/written in 8- or 1-bit units.
7
6
INTM0
0
0
Bit Position
Bit Name
0
ESN0
208
CHAPTER 7 INTERRUPT/EXCEPTION PROCESSING FUNCTION
0
0
0
0
0
0
0
0
0
0
0
NMI Pending
Indicates that NMI interrupt processing is in progress.
0: No NMI interrupt processing
1: NMI interrupt currently being processed
5
4
0
0
Edge Select NMI
Specifies the NMI pin's valid edge.
0: Falling edge
1: Rising edge
User's Manual U12688EJ4V0UM00
8
7
6
5
0
0
0
0
0
0
0
0
0
NP
EP
ID
Function
3
2
1
0
0
0
ESN0
Function
4
3
2
1
0
After reset
SAT
CY
OV
S Z
00000020H
0
Address
After reset
FFFFF180H
00H
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