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CHAPTER 5 INTERRUPT/EXCEPTION PROCESSING FUNCTION
5.2.3 Non-maskable interrupt status flag (NP)
The NP flag is a status flag that indicates that non-maskable interrupt (NMI) processing is under execution. This
flag is set when all the interrupts and requests have been accepted, and masks all interrupt requests and exceptions
to prohibit multiple interrupts from being acknowledged.
31
PSW
0
0
0
0
0
Bit Position
Bit Name
7
NP
5.2.4 Noise elimination circuit of NMI pin
NMI pin noise is eliminated with analog delay. The delay time is 60 to 220 ns. The signal input that changes in
less than this time period is not internally acknowledged.
NMI pin is used for canceling the software stop mode. In the software stop mode, noise elimination does not use
system clock for noise elimination because the internal system clock is stopped.
5.2.5 Edge detection function of NMI pin
INTM0 is a register that specifies the valid edge of the non-maskable interrupt (NMI). The valid edge of NMI can
be specified as the rising or falling edge by the ESN0 bit of this register.
This register can be read or written in 8- or 1-bit units.
7
6
INTM0
0
0
Bit Position
Bit Name
0
ESN0
106
0
0
0
0
0
0
0
0
0
0
0
0
0
NMI Pending
Indicates that NMI interrupt processing is under execution
0: No NMI interrupt processing
1: NMI interrupt currently processing
5
4
3
0
0
0
Edge Select NMI
Specifies valid edge of NMI pin
0: Falling edge
1: Rising edge
User's Manual U11969EJ3V0UM00
8
7
6
5
4
3
2
1
0
0
0
0
0
0
NP
EP
ID
SAT
CY
OV
S Z
Function
2
1
0
0
0
ESN0
Function
0
After reset
00000020H
Address
After reset
FFFFF180H
00H
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