Non-Maskable Interrupt Status Flag (Np); Edge Detection Function; Figure 7-4: Non-Maskable Interrupt Status Flag (Np); Figure 7-5: Nmi Edge Detection Specification: Interrupt Mode Register 0 (Intm0) - NEC V850E/PH2 User Manual

7.2.3 Non-maskable interrupt status flag (NP)

The NP flag is a status flag that indicates that non-maskable interrupt (NMI) processing is under
execution.
This flag is set when a NMI interrupt has been acknowledged, and masks all interrupt requests and
exceptions to prohibit multiple interrupts from being acknowledged.
31
PSW 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NP EP ID SAT CY OV S Z
NP
0 No NMI interrupt servicing
1 NMI interrupt currently servicing

7.2.4 Edge Detection Function

The behaviour of the non-maskable interrupt (NMI) can be specified by the interrupt mode register 0
(INTM0). The valid edge of the external NMI pin input can be specified by the ESN0 and ESN1 bits.
The INTM0 register can be read/written in 8-bit or 1-bit units.

Figure 7-5: NMI Edge Detection Specification: Interrupt Mode Register 0 (INTM0)

After reset: 00H
7
INTM0 ES21
ESN1
0
0
1
1
228
Chapter 7 Interrupt/Exception Processing Function

Figure 7-4: Non-maskable Interrupt Status Flag (NP)

R/W
6 5
ES20 ES11
ESN0
0 Falling edge
1 Rising edge
0 Setting prohibited
1 Both, rising and falling edges
User's Manual U16580EE3V1UD00
NMI Servicing Status
Address: FFFFF880H
4 3
ES10 ES01
Valid Edge Specification of NMI pin input
8 7 6 5 4 3 2 1 0
2 1
ES00 ESN1 ESN0
After reset
00000020H
0