Block Diagram - Fujitsu MB91260B Series Hardware Manual

CHAPTER 1 OVERVIEW
1.2

Block Diagram

This section shows a block diagram of the MB91260B series.
■ Block Diagram
X0,X1
MD0 to MD2
INIT
INT0 to INT9
NMI
SIN0 to SIN2
SOT0 to SOT2
SCK0 to SCK2
AVcc
ADTG0
AN0 to AN7
AVRH0
ADTG1
AVRH1
AN8 to AN9
ADTG2
AVRH2
AN10 to AN11
4
Figure 1.2-1 Block Diagram
FR 60Lite
CPU Core
32
Bit search
Multiply-
accumulate macro
Bus
ROM 128KB /
ROM 256KB /
Converter
Flash 256KB
RAM 8 KB
32
32 to 16
Adapter
Clock
control
16
Interrupt
controller
10ch
external interrupt
3ch
UART
3ch
U-TIMER
8ch input
8/10bit A/D-0
2ch input
8/10bit A/D-1
2ch input
8/10bit A/D-2
32
DMAC 5ch
PORT I/F
3ch
reload timer
16-bit
2ch
PWC timer
16-bit
8ch
8/16-bit PPG timer
Multifunction timers
Free Run Timer 1ch
Input Capture 4ch
Output compare 6ch
Waveform generator
PORT
TIN0 to TIN2
TOT1 to TOT2
PWI0 to PWI1
PPG0 to PPG15
CKI
IC0 to IC3
RTO0 to RTO5
DTTI