Serial Mode Register (Smr0/1/2/3/4) - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

12.3 Register and Register Details

12.3.1 Serial Mode Register (SMR0/1/2/3/4)

Serial mode register
Address : 000020
000024
000028
000088
000082
Read/write
Initial value
The SMR register specifies the UART operation mode. Set the operation mode while the UART is stopped.
Do not write data in this register during UART operation.
[bits 7 and 6] MD1 and MD0 (Mode select):
These bits are used to select the UART operation mode.
Mode MD1
0
1
2
-
Note: In CLK asynchronous multi-processor mode (mode 1), two or more slave CPUs are
connected to a single host CPU. This resource cannot identify the format of the
received data.
Therefore, this resource only supports a master in multi-processor mode.
Since the parity check function cannot be used, write '0' to PEN of the SCR register.
[bits 5 to 3] CS2, CS1, and CS0 (Clock select):These bits are used to select the baud rate clock source.
When a dedicated baud rate generator is selected, the baud rate is determined at the same time.
Note: If an internal timer is selected, timer 0 is used for UART0 and UART3 in the MB90580
series.
Note: If an internal timer is selected, timer 1 is used for UART1 and UART4 in the MB90580
series.
Note: If an internal timer is selected, timer 0 is used for UART2 in the MB90580 series.
[bit 2] Reserved bit
Always write '0' to this bit.
126 Chapter 12: UART
H
7 6
H
H
MD1 MD0
H
H
(R/W) (R/W)
(0) (0)
MD0 Operation mode
0 0 Asynchronous normal mode
0 1 Asynchronous multi-processor mode
1 0 CLK synchronous mode
1 1 Setting inhibited
CS2 CS1 CS0
000 to 100
B B
1 0 1
1 1 0
1 1 1
5 4 3
CS2 CS1 CS0 Reserved SCKE
(R/W) (R/W) (R/W)
(0) (0) (0)
Clock input
Dedicated baud rate generator
reserved
Internal timer
External clock
2 1 0
SOE
(R/W) (R/W) (R/W)
(0) (0) (0)
Bit number
SMR0
SMR1
SMR2
SMR3
SMR4
MB90580 Series