Figure 77. Ich4-M Ac'97 - Ac_Bit_Clk Topology; Figure 78. Ich4-M Ac'97 - Ac_Sdout/Ac_Sync Topology; Table 65. Ac'97 Ac_Bit_Clk Routing Summary - Intel 852GM Design Manual

I/O Subsystem
Figure 77. ICH4-M AC'97 – AC_BIT_CLK Topology

Table 65. AC'97 AC_BIT_CLK Routing Summary

AC'97 Routing
Requirements
5 on 5
NOTES:
1. Simulations were performed using Analog Device's Codec (AD1885) and the Cirrus Logic's Codec (CS4205b).
Results showed that if the AD1885 codec was used a 33- Ω resistor was best for R1 and if the CS4205b codec
was used a 47- Ω resistor for R1 was best.
2. Bench data shows that a 47- Ω resistor for R1 is best for the Sigmatel* 9750 codec.
Figure 78. ICH4-M AC'97 – AC_SDOUT/AC_SYNC Topology
160
ICH4-M
R1
L1
AC_BIT_CLK
Maximum Trace Length
(inches)
L1 = (1 to 8) – L3
L2 = 0.1 to 6
L3 = 0.1 to 0.4
L4 = (1 to 6) – L3
ICH4-M
L2
AC_SDOUT
C
R2
L3 L3 L4
O
N
N
L2
Primary
Codec
Series Termination
Resistance
R1 = 33 Ω - 47 Ω
R2 = Option 0 Ω resistor for
debugging purposes
C
R2
O
L3 L1
N
N
L3
R1
L4
Primary
Codec
®
Intel 852GM Chipset Platform Design Guide
R
AC_BIT_CLK Signal
Length Matching
N/A