17.2.2
Block Diagram
Figure 17.1 shows a block diagram of the flash memory.
Legend:
FLMCR: Flash memory control register*
EBR: Erase block register*
RAMCR: RAM control register*
FLMSR: Flash memory status register*
Notes: 1. Functions as the FWE pin in the versions with on-chip flash memory, and as the RESO
pin in the versions with on-chip mask ROM.
2. The registers that control the flash memory (FLMCR, EBR, RAMCR, and FLMSR) are
used only in the versions with on-chip flash memory. They are not provided in the
versions with on-chip mask ROM. Reading the corresponding addresses in a mask
ROM version will always return 1s, and writes to these addresses are disabled.
Internal data bus (upper 8 bits)
Internal data bus (lower 8 bits)
FLMCR
EBR
Bus interface/controller
RAMCR
FLMSR
H'00000
H'00002
On-chip Flash memory
H'1FFFC
H'1FFFE
even address odd address
2
2
2
Figure 17.1 Block Diagram of Flash Memory
H'00001
H'00003
(128 kbytes)
H'1FFFD
H'1FFFF
2
Operating
FWE pin*
mode
Mode pins
1
477