Pin Configuration; Register Configuration - Hitachi H8/3062 Hardware Manual

19.2.2

Pin Configuration

The flash memory is controlled by means of the pins shown in table 19.3.
Table 19.3 Flash Memory Pins
Pin Name
Reset
Flash write enable
Mode 2
Mode 1
Mode 0
Transmit data
Receive data
19.2.3

Register Configuration

The registers used to control the on-chip flash memory when enabled are shown in table 19.4.
Table 19.4 Flash Memory Registers
Register Name
Flash memory control register 1
Flash memory control register 2
Erase block register
RAM control register
Notes: FLMCR1, FLMCR2, EBR, and RAMCR are 8-bit registers, and should be accessed by byte
access. These registers are used only in the versions with on-chip flash memory, and are
not provided in the versions with on-chip mask ROM. Reading the corresponding
addresses in a mask ROM version will always return 1s, and writes to these addresses are
invalid.
1. Lower 20 bits of address in advanced mode.
2. When a high level is input to the FWE pin, the initial value is H'80.
Abbreviation I/O
RES
Input
FWE Input
MD Input
2
MD Input
1
MD Input
0
TxD Output
1
RxD Input
1
Abbreviation
FLMCR1
FLMCR2
EBR
RAMCR
Function
Reset
Flash program/erase protection by hardware
Sets H8/3062F-ZTAT A-mask version
operating mode
Sets H8/3062F-ZTAT A-mask version
operating mode
Sets H8/3062F-ZTAT A-mask version
operating mode
Serial transmit data output
Serial receive data input
R/W Initial Value
2
R/W H'00*
R H'00
R/W H'00
R/W H'F1
1
Address*
H'EE030
H'EE031
H'EE032
H'EE077
573