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9.2.3
Time Constant Registers B (TCORB)
Bit
15
Initial value
1
Read/Write
R/W
R/W
Bit
15
Initial value
1
Read/Write
R/W
R/W
TCORB0 to TCORB3 are 8-bit readable/writable registers. The TCORB0 and TCORB1 pair, and
the TCORB2 and TCORB3 pair, can each be accessed as a 16-bit register by word access.
The TCORB value is constantly compared with the 8TCNT value. When a match is detected, the
corresponding compare match flag B (CMFB) is set to 1 in 8TCSR*.
The timer output can be freely controlled by these compare match signals and the settings of
output/input capture edge select bits 3 and 2 (OIS3, OIS2) in 8TCSR.
When TCORB is used for input capture, it stores the 8TCNT value on detection of an external
input capture signal. At this time, the CMFB flag is set to 1 in the corresponding 8TCSR register.
The detected edge of the input capture signal is set in 8TCSR.
Each TCORB register is initialized to H'FF by a reset and in standby mode.
Note: * When channel 1 and channel 3 are designated for TCORB input capture, the CMFB flag is
not set by a channel 0 or channel 2 compare match B.
288
TCORB0
14
13
12
11
1
1
1
1
R/W
R/W
R/W
TCORB2
14
13
12
11
1
1
1
1
R/W
R/W
R/W
10
9
8
7
1
1
1
1
R/W
R/W
R/W
R/W
10
9
8
7
1
1
1
1
R/W
R/W
R/W
R/W
TCORB1
6
5
4
3
1
1
1
1
R/W
R/W
R/W
R/W
TCORB3
6
5
4
3
1
1
1
1
R/W
R/W
R/W
R/W
2
1
0
1
1
1
R/W
R/W
R/W
2
1
0
1
1
1
R/W
R/W
R/W
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