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1.6
Setting Oscillation Settling Wait Time
When software standby mode is used, after exiting software standby mode a wait period must be
provided to allow the clock to stabilize. Select the length of time for which the CPU and peripheral
functions are to wait by setting bits STS2 to STS0 in the system control register (SYSCR) and bits
DIV1 and DIV0 in the division ratio control register (DIVCR) according to the operating
frequency of the chip.
For the H8/3064F-ZTAT and the H8/3062F-ZTAT A-mask version, ensure that the oscillation
settling wait time is at least 0.1 ms when operating on an external clock.
For setting details, see section 21.4.3, Setting Oscillation Settling Wait Time after Exiting
Software Standby Mode.
1.7
Caution on Crystal Resonator Connection
The H8/3064F-ZTAT and H8/3062F-ZTAT A-mask version support an operating frequency of up
to 25 MHz. If a crystal resonator with a frequency higher than 20 MHz is connected, attention
must be paid to circuit constants such as external load capacitance values. For details see section
20.2.1, Connecting a Crystal Resonator.
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