Hitachi H8/3062 Hardware Manual page 6

Single-chip microcomputer
Hide thumbs Also See for H8/3062:
Table of Contents

Advertisement

Page
Item
302 to
9.4.4 Timing of Status Flag Setting
306
9.4.5 Operation with Cascaded Connection
9.4.6 Input Capture Setting
307
9.5.1 Interrupt Sources
308
9.6 8-Bit Timer Application Example
315
9.7.7 Contention between 8TCNT Byte Write and
Increment in 16-Bit Count Mode (Cascaded
Connection)
Figure 9.24 Contention between 8TCNT Byte Write
and Increment in 16-Bit Count Mode
379
Table 12.3 Examples of Bit Rates and BRR Settings in
Asynchronous Mode
380
Table 12.4 Examples of Bit Rates and BRR Settings in
Synchronous Mode
382
Table 12.5 Maximum Bit Rates for Various
Frequencies (Asynchronous Mode)
383
Table 12.6 Maximum Bit Rates with External Clock
Input (Asynchronous Mode)
384
Table 12.7 Maximum Bit Rates with External Clock
Input (Synchronous Mode)
391
Figure 12.5 Sample Flowchart for Transmitting Serial
Data
417
13.1 Overview
430
Table 13.5 Bit Rates (bits/s) for Various BRR Settings
(When n=0)
431
Table 13.6 BRR Settings for Typical Bit Rates
(bits/s)(When n=0)
Table 13.7 Maximum Bit Rates for Various
Frequencies (Smart Card Interface Mode)
438
Figure 13.10 Procedure for Stopping and Restarting
the Clock
441
13.4 Usage Notes
443
14.1 Overview
14.1.1 Features
471
Table 16.1 H8/3062 Series On-Chip RAM
Specifications
Description
Description amended
Description amended
Amended
Description amended
25 MHz added
25 MHz added
25 MHz added
25 MHz added
25 MHz added
Description added
Description amended
25 MHz added
Note amended
25 MHz added
20 MHz and 25 MHz added
Amended
Description added
Description added
High-speed conversion
25 MHz added
Added

Advertisement

Table of Contents
loading

Table of Contents