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11.2.2
Timer Control/Status Register (TCSR)
TCSR is an 8-bit readable and writable register. Its functions include selecting the timer mode and
clock source.
Bit
OVF
Initial value
Read/Write
R/(W)
Overflow flag
Status flag indicating overflow
Notes: The method for writing to TCSR is different from that for general registers to prevent
inadvertent overwriting. For details see section 11.2.4, Notes on Register Access.
*
Only 0 can be written, to clear the flag.
Bits 7 to 5 are initialized to 0 by a reset and in standby mode. Bits 2 to 0 are initialized to 0 by a
reset. In software standby mode bits 2 to 0 are not initialized, but retain their previous values.
Bit 7—Overflow Flag (OVF): This status flag indicates that the timer counter has overflowed
from H'FF to H'00.
Bit 7
OVF
Description
0
[Clearing condition]
Cleared by reading OVF when OVF = 1, then writing 0 in OVF
1
[Setting condition]
Set when TCNT changes from H'FF to H'00
348
7
6
WT/IT
TME
0
0
*
R/W
R/W
Timer enable
Selects whether TCNT runs or halts
Timer mode select
Selects the mode
5
4
—
—
0
1
—
—
Reserved bits
3
2
CKS2
CKS1
1
0
R/W
R/W
Clock select
These bits select the
TCNT clock source
1
0
CKS0
0
0
R/W
(Initial value)
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